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Job Title: Principal Engineer, DDR Verification & Silicon DDR bring up
Job Location: San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office)
Job ID: AI2560
Description:
The DDR Design Verification (DV) engineer at SiMa is involved in the functional verification of DDR controllers and DDR-phy at block, sub-system and SoC level. Will also be involved in bring-up and debug on emulator. Generate required DDR controller and phy initialization (register programming code sequence) for DDR bring up on silicon.
Key Responsibilities:
As the DDR Design Verification & Silicon DDR bring up Engineer, you will
Required Background:
Personal attributes:
Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.
The annual salary for this position ranges from $203,800 - $315,900. The actual annual salary offered will depend on several factors, including - among others - job-related skills, experience, technical expertise, qualifications, work location, and business needs. The annual salary range for this position is subject to change and may be adjusted in the future.
In addition to base salary, this role is also eligible for private company equity, and a comprehensive package of employee benefits. Please note that the salary ranges listed for U.S. roles reflect base salary only and do not include equity or other forms of compensation.
EEO Employer: SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.